发明授权
US4963512A Method for forming conductor layers and method for fabricating
multilayer substrates
失效
形成导体层的方法和用于制造多层基板的方法
- 专利标题: Method for forming conductor layers and method for fabricating multilayer substrates
- 专利标题(中): 形成导体层的方法和用于制造多层基板的方法
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申请号: US281879申请日: 1988-12-08
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公开(公告)号: US4963512A公开(公告)日: 1990-10-16
- 发明人: Shoichi Iwanaga , Akio Fujiwara , Takayoshi Sowa , Hitoshi Yokono
- 申请人: Shoichi Iwanaga , Akio Fujiwara , Takayoshi Sowa , Hitoshi Yokono
- 申请人地址: JPX Tokyo
- 专利权人: Hitachi, Ltd.
- 当前专利权人: Hitachi, Ltd.
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX61-64970 19860325; JPX61-103765 19860508
- 主分类号: H01L21/48
- IPC分类号: H01L21/48 ; H05K3/00 ; H05K3/38 ; H05K3/46
摘要:
A method for forming conductor layers of substrates for mounting LSIs and the like and a fabrication method of multilayer substrates are disclosed. These methods comprise steps of forming a metal underlayer having a shape similar to that of a conductor pattern on the substrate, forming an insulation layer over portions of the substrate which are not covered by the metal underlayer, and disposing a plating layer on the metal underlayer by carrying out electroless plating while using the insulation layer as the resist and thereby forming conductors. As compared with a conventional conductor layer forming method, the number of fabrication steps is reduced. And the elimination of the surface grinding step facilitates the fabrication.
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