发明授权
- 专利标题: Duplex data processing system with programmable bus configuration
- 专利标题(中): 具有可编程总线配置的双工数据处理系统
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申请号: US36509申请日: 1987-04-09
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公开(公告)号: US4975838A公开(公告)日: 1990-12-04
- 发明人: Kenichi Mizuno , Takashi Morita , Teruo Ikeda
- 申请人: Kenichi Mizuno , Takashi Morita , Teruo Ikeda
- 申请人地址: JPX Tokyo
- 专利权人: Hitachi, Ltd.
- 当前专利权人: Hitachi, Ltd.
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX61-79908 19860409
- 主分类号: G06F15/16
- IPC分类号: G06F15/16 ; G06F11/20 ; G06F15/173 ; H04Q3/545
摘要:
A duplex data processing system includes two processors each provided with a bus connecting unit which disconnects the associated CPU bus from the cross connection bus in a separate mode or connects the CPU bus to the cross connection bus in a duplex mode. The system operates with a logically unified CPU bus through the connection of the internal CPU buses by the two bus connecting units in both processors.
公开/授权文献
- USD373248S Suitcase bracket 公开/授权日:1996-09-03
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