发明授权
- 专利标题： MOS-pilot structure for an insulated gate transistor
- 专利标题（中）： 绝缘栅晶体管的MOS引导结构
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申请号： US329034申请日： 1989-03-27
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公开(公告)号： US4980740A公开(公告)日： 1990-12-25
- 发明人: Deva N. Pattanayak , Bantval J. Baliga
- 申请人： Deva N. Pattanayak , Bantval J. Baliga
- 申请人地址： NY Schenectady
- 专利权人： General Electric Company
- 当前专利权人： General Electric Company
- 当前专利权人地址： NY Schenectady
- 主分类号： H01L21/8234
- IPC分类号： H01L21/8234 ; H01L27/04 ; H01L27/088 ; H01L29/10 ; H01L29/739 ; H01L29/78
摘要：
A MOS-pilot structure for an IGT device consisting of a multiplicity of IGT cells interconnected in a lattice network includes a plurality of pilot emitter electrodes each in electrical contact with only at least one pilot emitter region of a first plurality of the multiplicity of IGT cells and electrically isolated from a common cathode electrode of the multiplicity of IGT cells. The plurality of pilot emitter electrodes are each electrically connected to a contact metal strip deposited on the substrate surface and spaced therefrom by a layer of insulation. The contact metal strip is connected to ground potential through a sense resistor for producing a sense voltage responsive only to the channel currents flowing through the at least one pilot emitter regions; therefore, a MOS pilot structure that utilizes only the MOS channel current to produce the sense voltage to cause turn-off of the IGT device at a large total current is disclosed. The MOS-pilot structure does not suffer from the avalanche breakdown problems during turn-off, that are associated with other prior art IGT pilot structures.
公开/授权文献
- US5613995A Method for making planar optical waveguides 公开/授权日：1997-03-25
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