An electronic digital computer has a warning facility for indicating activity and operation, or lack of same, of the central processor in the system. It is done by providing a signal indicative of continuing operation of the central processor to activate an indicator circuit. The indicated circuit utilizes an RC circuit for maintaining a high level through a high comparator when the processor is operational. When the central processor becomes non-operational, the capacitor discharges to a point where a low comparator responds, causing the capacitor to begin charging to its high value. The associated circuits, using this feature, maintain an LED in the active stage until such time as there is no signal indicating continuing operation of the central processor, at which time the LED begins an approximate 50% duty cycle resulting in a blinking indicator.