发明授权
- 专利标题: Reset circuit for electronic apparatus
- 专利标题(中): 电子设备复位电路
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申请号: US296332申请日: 1989-01-10
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公开(公告)号: US5007014A公开(公告)日: 1991-04-09
- 发明人: Toshio Nishimura
- 申请人: Toshio Nishimura
- 申请人地址: JPX Osaka
- 专利权人: Sharp Kabushiki Kaisha
- 当前专利权人: Sharp Kabushiki Kaisha
- 当前专利权人地址: JPX Osaka
- 优先权: JPX59-4172 19840111; JPX59-8967 19840120
- 主分类号: G06F1/24
- IPC分类号: G06F1/24 ; G06F11/00 ; G11C7/20
摘要:
An electronic apparatus includes a delay circuit which generates a delayed output signal to initial-clear the memory elements and a detection circuit for detecting a startup which operates at an operating voltage greater than the absolute value of any of the operating voltages of the memory elements. The output signal from the delay circuit is released on the basis of the output from the detection circuit. A reset circuit of this type obviates the need for a system reset key and thereby eliminates the disadvantages associated with such a key.
公开/授权文献
- US4389228A Constant tensioning device 公开/授权日:1983-06-21