A p-channel MOS transistor is connected in series to a floating gate n-channel MOS transistor forming a memory cell, so that the p-channel MOS transistor functions as the load of the memory cell. The operational characteristic of the p-channel MOS transistor determines the data-writing current of the memory cell. Hence, hardly any change occurs in the data-writing current, even if the operation characteristic of the memory cell changes. A semiconductor memory includes memory cells constituted by floating gate n-channel MOS transistors. The memory further includes a data-reading, column-selecting circuit comprising n-channel MOS transistors, and a data-writing, column-selecting circuit comprising p-channel MOS transistors. By way of the above structure, the data-writing voltage can be prevented from being lowered.