发明授权
US5060034A Memory device using thin film transistors having an insulation film with
Si/N composition ratio of 0.85 to 1.1
失效
使用具有0.85至1.1的SI / N组成比的绝缘膜的薄膜晶体管的存储器件
- 专利标题： Memory device using thin film transistors having an insulation film with Si/N composition ratio of 0.85 to 1.1
- 专利标题（中）： 使用具有0.85至1.1的SI / N组成比的绝缘膜的薄膜晶体管的存储器件
-
申请号： US427252申请日： 1989-10-25
-
公开(公告)号： US5060034A公开(公告)日： 1991-10-22
- 发明人: Hideaki Shimizu , Nobuyuki Yamamura , Hiroyasu Yamada , Haruo Wakai , Hiroshi Matsumoto
- 申请人： Hideaki Shimizu , Nobuyuki Yamamura , Hiroyasu Yamada , Haruo Wakai , Hiroshi Matsumoto
- 申请人地址： JPX Tokyo
- 专利权人： Casio Computer Co., Ltd.
- 当前专利权人： Casio Computer Co., Ltd.
- 当前专利权人地址： JPX Tokyo
- 优先权： JPX63-274444 19881101; JPX63-313811 19881214; JPX1-15164 19890126; JPX1-117581 19890512; JPX1-117583 19890512
- 主分类号： H01L27/115
- IPC分类号： H01L27/115
摘要：
A memory device includes a memory element composed of a first thin film transistor having a memory function, and a select element composed of a second thin film transistor for selecting the memory element. A gate insulation film of the first thin film transistor has a charge storage function. A gate insulation film of the second thin film transistor does not have any charge storage function. If a plurality of the memory devices are arranged in matrix form, this configuration can be used as E.sup.2 PROM. By forming the first and second thin film transistors simultaneously, it is possible to form the first and second thin film transistors easily in the simple manufacturing steps.