发明授权
US5068753A Data reproducing circuit for memory system having an equalizer
generating two different equalizing signals used for data reproduction
失效
具有生成用于数据复制的两个不同均衡信号的均衡器的存储器系统的数据再生电路
- 专利标题： Data reproducing circuit for memory system having an equalizer generating two different equalizing signals used for data reproduction
- 专利标题（中）： 具有生成用于数据复制的两个不同均衡信号的均衡器的存储器系统的数据再生电路
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申请号： US323943申请日： 1989-03-15
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公开(公告)号： US5068753A公开(公告)日： 1991-11-26
- 发明人: Masahide Kanegae
- 申请人： Masahide Kanegae
- 申请人地址： JPX Kawasaki
- 专利权人： Fujitsu Limited
- 当前专利权人： Fujitsu Limited
- 当前专利权人地址： JPX Kawasaki
- 优先权： JPX63-62769 19880316; JPX63-62770 19880316
- 主分类号： G11B5/035
- IPC分类号： G11B5/035 ; G11B20/10
摘要：
A data recording and reproducing circuit for a memory system, such as a magnetic disk memory system. The circuit includes a reflection type cosine equalizer and a data reproducing circuit. The equalizer includes a first equalizing circuit, having a first equalizing gain, and outputting a first equalized signal, and a second equalizing circuit having a second equalizing gain smaller than the first equalizing gain, and outputting a second equalizing circuit. The data reproducing circuit includes a differentiator for differentiating the first equalized signal, a window generating circuit for generating a window signal from the second equalized signal, and a data separator for discriminating the differentiated signal in response to the window signal to produce a pulsed reproduction signal.
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