发明授权
- 专利标题: Elastic buffer circuit
- 专利标题(中): 弹性缓冲电路
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申请号: US520667申请日: 1990-05-08
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公开(公告)号: US5077761A公开(公告)日: 1991-12-31
- 发明人: Atsuhiko Tokunaga
- 申请人: Atsuhiko Tokunaga
- 申请人地址: JPX
- 专利权人: NEC Corporation
- 当前专利权人: NEC Corporation
- 当前专利权人地址: JPX
- 优先权: JPX1-115732 19890508
- 主分类号: H04B7/212
- IPC分类号: H04B7/212 ; H04J3/06 ; H04L13/08
摘要:
An elastic buffer circuit for adjusting the timing between a satellite communication system of a time division multi-access (TDMA) type and a ground communication system is provided with a stable oscillator for generating a first clock signal whose frequency is N (N is an integer not smaller than 2) times the received clock frequency, a clock generating circuit for generating a second clock signal by frequency-dividing the first clock signal by N and, at the same time, setting the phase of the second clock signal on the basis of a sync code detection signal, and a data memory circuit for temporarily storing data signals in accordance with the second clock signal.
公开/授权文献
- US5694238A Device for interconnecting an amplifying fiber 公开/授权日:1997-12-02
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