发明授权
- 专利标题: Vertical DRAM cell and method
- 专利标题(中): 垂直DRAM单元及方法
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申请号: US618011申请日: 1990-11-26
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公开(公告)号: US5102817A公开(公告)日: 1992-04-07
- 发明人: Pallab K. Chatterjee , Ashwin H. Shah
- 申请人: Pallab K. Chatterjee , Ashwin H. Shah
- 申请人地址: TX Dallas
- 专利权人: Texas Instruments Incorporated
- 当前专利权人: Texas Instruments Incorporated
- 当前专利权人地址: TX Dallas
- 主分类号: H01L27/108
- IPC分类号: H01L27/108
摘要:
DRAM cells and arrays of cell on a semiconductor substrate, together with methods of fabrication, are disclosed wherein the cells are formed in pairs or quartets by excavating a trench or two trenches through the cell elements to split an original cell into two or four cells during the fabrication. The cells include vertical field effect transistors and capacitors along the trech sidewalls with word lines and bit lines crossing over the cells.
公开/授权文献
- US4605933A Extended bandwidth microstrip antenna 公开/授权日:1986-08-12