A data reproducing circuit for a memory system having a data sensing head includes a first equalizing circuit for correcting a shift of a position of a peak of a reproduction signal supplied from the data sensing head and for generating a first signal in which the shift of the position of the peak has been corrected, and a second equalizing circuit for correcting a variation in an amplitude of the reproduction signal supplied from the data sensing head and for generating a second signal in which the variation of the amplitude of the reproduction signal has been corrected. A peak position detecting circuit detects the position of the peak of the reproduction signal from the first signal supplied from the first equalizing circuit. An amplitude detecting circuit detects the amplitude of the reproduction signal from the second signal supplied from the second equalizing circuit. A gate circuit generates a pulsed reproduction signal from the peak position detected by the peak position detecting circuit and the amplitude detected by the amplitude detecting circuit.