A computer-assisted automatic wiring method is presented for logic LSI substrates wherein channel boundary terminals are defined on the boundary line of the first and second channels forming a T-shaped crossing region between the function blocks arranged on a substrate after global wiring process. These channel boundary terminals are roughly divided into the first and second terminal groups there may remain channel boundary terminals which do not belong to any one of the groups. The first terminal group includes terminals intersecting wirings which tend to run along the first direction in the second channel, which corresponds to a top bar of the letter "T". The second terminal group includes terminals intersecting wirings which have tend to run along the second direction opposite to the first direction in said second channel. A pair of channel boundary terminals is sequentially selected from the first and second groups. Typically, the same wiring track is assigned to two wirings associated with the selected each pair of terminals in the second channel.