发明授权
US5163139A Instruction preprocessor for conditionally combining short memory
instructions into virtual long instructions
失效
指令预处理程序用于将短暂的记忆指令组合成虚拟长的指令
- 专利标题: Instruction preprocessor for conditionally combining short memory instructions into virtual long instructions
- 专利标题(中): 指令预处理程序用于将短暂的记忆指令组合成虚拟长的指令
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申请号: US575140申请日: 1990-08-29
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公开(公告)号: US5163139A公开(公告)日: 1992-11-10
- 发明人: Stephen G. Haigh , Toru Baji
- 申请人: Stephen G. Haigh , Toru Baji
- 申请人地址: CA Brisbane
- 专利权人: Hitachi America, Ltd.
- 当前专利权人: Hitachi America, Ltd.
- 当前专利权人地址: CA Brisbane
- 主分类号: G06F9/38
- IPC分类号: G06F9/38
摘要:
An instruction memory apparatus for a data processing unit stores a sequence of instructions. At each instruction fetch cycle, two sequentially adjacent instructions are accessed. An instruction preprocessing unit, coupled to the internal instruction memory, combines the two sequentially adjacent instructions into a single long instruction word when the two instructions meet predefined criteria for being combined. The first of the two instructions is combined with a no-operation instruction to generate a long instruction word when the predefined criteria are not met. In that case, the second instruction [may be accessed again] is used during the next instruction fetch cycle as the first of the two sequentially adjacent instructions to be processed during that next instruction fetch cycle.