A semiconductor memory device includes a plurality of ports enabling simultaneous writing and reading of data of M words.times.N bits. A plurality of memory cells are arranged in (M/n) rows.times.(n.times.N) columns in a memory call array, write and read word lines are commonly connected to the memory cells of one row, and write column selecting line are connected to every n (the number of words) memory cells of the memory cells of one row. Write and read bit lines are connected to the memory cells of one column. Data is input to the write bit line from an input terminal through a write circuit. and data read from the memory cell is output to an output terminal through a sense amplifier. A first port is formed by the write word lines, the write column selecting lines, the write bit lines and the input terminal, and a second port is formed by the read word lines, read bit lines and the output terminal. M, N and n are natural numbers and M, N.gtoreq.n.