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US5183771A Method of manufacturing LDDFET having double sidewall spacers 失效
制造具有双层隔板的LDDFET的方法

Method of manufacturing LDDFET having double sidewall spacers
摘要:
In an MIS transistor of a type having LDD and salicide structures, the location of the boundary between the high and low impurity density source/drain regions and the positions of the salicide layers on the source/drain regions are independently controlled during fabrication using a double gate sidewall structure. An MIS transistor improved thereby has its boundary between the high and low impurity density source/drain regions at or displaced toward the control gate electrode with respect to the interface of the double gate sidewall structure.
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