发明授权
- 专利标题: Method of manufacturing LDDFET having double sidewall spacers
- 专利标题(中): 制造具有双层隔板的LDDFET的方法
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申请号: US732541申请日: 1991-07-19
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公开(公告)号: US5183771A公开(公告)日: 1993-02-02
- 发明人: Katsuyoshi Mitsui , masahide Inuishi
- 申请人: Katsuyoshi Mitsui , masahide Inuishi
- 申请人地址: JPX Tokyo
- 专利权人: Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人: Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX1-1602 19890107
- 主分类号: H01L21/336
- IPC分类号: H01L21/336 ; H01L29/78
摘要:
In an MIS transistor of a type having LDD and salicide structures, the location of the boundary between the high and low impurity density source/drain regions and the positions of the salicide layers on the source/drain regions are independently controlled during fabrication using a double gate sidewall structure. An MIS transistor improved thereby has its boundary between the high and low impurity density source/drain regions at or displaced toward the control gate electrode with respect to the interface of the double gate sidewall structure.
公开/授权文献
- US5771771A Apparatus for cutting a sausage product 公开/授权日:1998-06-30
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