发明授权
- 专利标题: Semiconductor memory device having redundant memory cells
- 专利标题(中): 具有冗余存储器单元的半导体存储器件
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申请号: US570057申请日: 1990-08-20
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公开(公告)号: US5197030A公开(公告)日: 1993-03-23
- 发明人: Takao Akaogi , Mitsuo Higuchi
- 申请人: Takao Akaogi , Mitsuo Higuchi
- 申请人地址: JPX Kanagawa
- 专利权人: Fujitsu Limited
- 当前专利权人: Fujitsu Limited
- 当前专利权人地址: JPX Kanagawa
- 优先权: JPX1-219973 19890825
- 主分类号: G11C8/18
- IPC分类号: G11C8/18 ; G11C29/00 ; G11C29/04
摘要:
A semiconductor memory device includes a memory cell array, a data readout circuit, a decoder circuit and an address transition detecting circuit which detects an address transition of an input address signal and which generates an address transition detection pulse. A redundancy circuit determines whether or not the input address signal indicates a defective memory cell and outputs a redundancy signal to the decoder so that the decoder selects one redundant memory cell in place of the specified defective memory cell. A pulse generator generates a pulse signal having a pulse duration time sufficient to reset the memory cell array and the data readout circuit before reading data from the memory cell array in a case where the redundancy circuit outputs the redundancy signal. The pulse duration time of the pulse signal starts from a time when the address transition detecting circuit generates the address transition signal.