发明授权
US5224071A Addressable memory unit having an improved unit selection circuit 失效
具有改进的单元选择电路的可寻址存储单元

Addressable memory unit having an improved unit selection circuit
摘要:
An addressable memory unit has address input buffer circuits which output a pair of output connections on which, in read or write mode, two signals which are complementary to one another are present but which may also adopt equal values in such a manner as to cause a predecoder and line selector to select all or none of the selection lines controlling the cells of the memory accessed.
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