发明授权
US5228139A Semiconductor integrated circuit device with test mode for testing CPU
using external signal
失效
具有测试模式的半导体集成电路器件，用于使用外部信号测试CPU
- 专利标题： Semiconductor integrated circuit device with test mode for testing CPU using external signal
- 专利标题（中）： 具有测试模式的半导体集成电路器件，用于使用外部信号测试CPU
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申请号： US840633申请日： 1992-02-21
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公开(公告)号： US5228139A公开(公告)日： 1993-07-13
- 发明人: Yoshiyuki Miwa , Tsuyoshi Jouno , Haruo Keida , Kunihiko Nakada , Hajime Yasuda
- 申请人： Yoshiyuki Miwa , Tsuyoshi Jouno , Haruo Keida , Kunihiko Nakada , Hajime Yasuda
- 申请人地址： JPX Tokyo JPX Tokyo
- 专利权人： Hitachi Ltd.,Hitachi Microcomputer Engineering Ltd.
- 当前专利权人： Hitachi Ltd.,Hitachi Microcomputer Engineering Ltd.
- 当前专利权人地址： JPX Tokyo JPX Tokyo
- 优先权： JPX63-96083 19880419
- 主分类号： G01R31/3185
- IPC分类号： G01R31/3185 ; G06F11/267
摘要：
An output gate means is provided which is capable of outputting individual signals selectively to an internal bus; the individual signals are interchanged among a plurality of functional modules connected to the internal bus which is interfaced with an external circuit. An input gate means is provided which is capable of supplying selectively a signal, input to the internal bus, to a specified functional module in place of an individual signal.