发明授权
- 专利标题: Method of manufacturing field effect transistor having a multilayer interconnection layer therein with tapered sidewall insulation
- 专利标题(中): 具有其中具有锥形侧壁绝缘体的多层互连层的场效应晶体管的方法
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申请号: US925153申请日: 1992-08-06
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公开(公告)号: US5229314A公开(公告)日: 1993-07-20
- 发明人: Tomonori Okudaira , Hideaki Arima , Makoto Ohi , Kaoru Motonami , Yasushi Matsui
- 申请人: Tomonori Okudaira , Hideaki Arima , Makoto Ohi , Kaoru Motonami , Yasushi Matsui
- 申请人地址: JPX Tokyo
- 专利权人: Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人: Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX2-115641 19900501
- 主分类号: H01L27/108
- IPC分类号: H01L27/108 ; H01L29/417 ; H01L29/78
摘要:
A field effect transistor and a method of manufacturing thereof are disclosed that is not reduced in the characteristic of withstanding voltage between multilayer interconnection layers even when scaled to a higher integration. This field effect transistor includes side walls 21a formed on both sides of a bit line 15 so that the bottom side end contacts the upper surface of side walls 20a of gate electrodes 4b and 4c. The thickness of an insulating film interposed between gate electrodes 4b and 4c and a base portion 11a forming a low electrode 11 of a capacitor is not reduced. The characteristic of withstanding voltage is not deteriorated between multilayer interconnection layers even when scaled to higher integration.
公开/授权文献
- US6007211A Molded illuminating device 公开/授权日:1999-12-28