发明授权
- 专利标题: Semiconductor contact via structure and method
- 专利标题(中): 半导体与结构与方法联系
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申请号: US832088申请日: 1992-02-06
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公开(公告)号: US5246883A公开(公告)日: 1993-09-21
- 发明人: Yih-Shung Lin , Lun-Tseng Lu , Fu-Tai Liou , Che-Chia Wei , John L. Walters
- 申请人: Yih-Shung Lin , Lun-Tseng Lu , Fu-Tai Liou , Che-Chia Wei , John L. Walters
- 申请人地址: TX Carrollton
- 专利权人: SGS-Thomson Microelectronics, Inc.
- 当前专利权人: SGS-Thomson Microelectronics, Inc.
- 当前专利权人地址: TX Carrollton
- 主分类号: H01L21/28
- IPC分类号: H01L21/28 ; H01L21/768 ; H01L23/485 ; H01L23/522
摘要:
A method is provided for forming contact vias in an integrated circuit. Initially, a first buffer layer is formed over an insulating layer in an integrated circuit. The first buffer layer has a different etch rate from the insulating layer. A second buffer layer is then formed over the first buffer layer, with the second buffer layer having an etch rate which is faster than the first buffer layer. An isotropic etch is performed to create an opening through the second buffer layer and a portion of the first buffer layer. Because the second buffer layer etches faster than the first buffer layer, the slant of the sideswalls of the opening can be controlled. An anisotropic etch is then performed to complete formation of the contact via.
公开/授权文献
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