发明授权
US5247396A PCM signal recording method and apparatus for recording four-channel data to be compatible with two-channel data 失效
用于记录四通道数据以与双通道数据兼容的PCM信号记录方法和装置

  • 专利标题: PCM signal recording method and apparatus for recording four-channel data to be compatible with two-channel data
  • 专利标题(中): 用于记录四通道数据以与双通道数据兼容的PCM信号记录方法和装置
  • 申请号: US350402
    申请日: 1989-05-11
  • 公开(公告)号: US5247396A
    公开(公告)日: 1993-09-21
  • 发明人: Yutaka NagaiToshifumi Takeuchi
  • 申请人: Yutaka NagaiToshifumi Takeuchi
  • 申请人地址: JPX Tokyo
  • 专利权人: Hitachi, Ltd.
  • 当前专利权人: Hitachi, Ltd.
  • 当前专利权人地址: JPX Tokyo
  • 优先权: JPX63-114647 19880513
  • 主分类号: G11B20/00
  • IPC分类号: G11B20/00 G11B20/10 G11B20/12 G11B20/18
PCM signal recording method and apparatus for recording four-channel
data to be compatible with two-channel data
摘要:
A PCM signal recording/reproducing apparatus includes write means for writing data on a recording medium, a data detecting circuit for detecting data from the recording medium, a temporary storage unit for storing temporarily the data to be recorded on the recording medium or the data reproduced from the recording medium, an error correcting circuit for correcting error of the data through cooperation with the storage unit and a switching circuit for changing over a first mode in which first data of two channels each having a sampling frequency of 48 KHz and a quantization bit number of n are recorded/reproduced with a second mode in which second data of two channels each having a sampling frequency of 32 KHz and a quantization bit number of n are recorded/reproduced in accordance with a recording format having a data location for the input data and dummy data location for dummy data to be added to the input data. Upon recording/reproduction of data of four channels including data of main two channels each having a sampling frequency of 32 KHz and a quantization number bits of n and two-sub-channels, recording/reproduction mode is changed over to the second mode in which the main two channel data are disposed at a data location on the recording format through the storage unit, while the input sub-two-channel data are disposed at the location for the dummy data on the recording format through a second block address control circuit.
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