This digital data reproducing apparatus is adapted to prevent reproduction errors of data, wherein a read gate opened when a fixed pattern in a header field for phase locking is detected is kept opened until the data reproduction in a data field is completed, whereby the phase locking in the data field is performed still in the same low-speed mode as when the PLL pull-in is completed in the header field, with the responding ability lowered to defects such as voids or the like in the phase locking pattern area in the data field.This digital data reproducing apparatus is adapted to prevent reproduction errors, wherein, when a reproduced data in a data field is locked, a read gate is opened after a fixed pattern recorded for phase locking is surely detected, so that the phase locking is started in a high-speed mode, while avoiding erroneous operations of the PLL.