发明授权
US5283873A Next line prediction apparatus for a pipelined computed system 失效
用于流水线计算系统的下一行预测装置

Next line prediction apparatus for a pipelined computed system
摘要:
A next line prediction mechanism for predicting a next instruction index to an instruction cache of a computer pipeline, has a latency equal to the cycle time of the instruction cache to maximize the instruction bandwidth out of the instruction cache. The instruction cache outputs a block of instructions with each fetch initiated by a next instruction index provided by the line prediction mechanism. The instructions of the block are processed in parallel for instruction decode and branch prediction to maintain a high rate of instruction flow through the pipeline.
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