发明授权
US5293605A Apparatus to supplement cache controller functionality in a memory store
and a cache memory
失效
用于补充存储器存储器和高速缓冲存储器中的高速缓存控制器功能的装置
- 专利标题： Apparatus to supplement cache controller functionality in a memory store and a cache memory
- 专利标题（中）： 用于补充存储器存储器和高速缓冲存储器中的高速缓存控制器功能的装置
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申请号： US663872申请日： 1991-03-04
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公开(公告)号： US5293605A公开(公告)日： 1994-03-08
- 发明人: David P. Wright
- 申请人： David P. Wright
- 申请人地址： JPX Tokyo
- 专利权人： Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人： Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人地址： JPX Tokyo
- 优先权： GBX8915422 19890705
- 主分类号： G06F12/08
- IPC分类号： G06F12/08 ; G06F12/00
摘要：
A computer comprises a CPU (11), a memory store (12) and a cache comprising a cache memory (17) and a cache controller (16), the CPU (11) being capable of receiving from a memory store (12), or from the cache memory (17), elements of data each arranged as a plurality of words of data associated with a common address, the cache controller (16) inherently only being capable of handling elements of data arranged as a single word of data and an associated address, there being provided a state machine to enable the cache controller (16) to handle elements of data each arranged as a plurality of words of data associated with a common address.
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