发明授权
US5297263A Microprocessor with pipeline system having exception processing features
失效
具有管道系统的微处理器具有异常处理功能
- 专利标题: Microprocessor with pipeline system having exception processing features
- 专利标题(中): 具有管道系统的微处理器具有异常处理功能
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申请号: US871598申请日: 1992-04-17
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公开(公告)号: US5297263A公开(公告)日: 1994-03-22
- 发明人: Akira Ohtsuka , Toru Shimizu
- 申请人: Akira Ohtsuka , Toru Shimizu
- 申请人地址: JPX Tokyo
- 专利权人: Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人: Mitsubishi Denki Kabushiki Kaisha
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX62-179365 19870717
- 主分类号: G06F9/38
- IPC分类号: G06F9/38 ; G06F11/00
摘要:
A method and apparatus for processing exceptions in a microprocessor having a plurality of pipelined stages. The method comprises the steps of generating an exception processing code at a given stage to indicate the occurrence of an exception at the given stage; temporarily stopping processing at the given stage; transferring the exception processing code to a special stage; decoding said exception processing code at the special stage; and causing the pipeline to execute exception processing when the exception processing code is decoded at the special stage. Using the invention, the microprocessor can avoid much of the delay and complexity resulting from using an external circuit to control exception processing and can cope with the occurrence of an exception at any stage without prematurely cancelling or reexecuting processing steps. The invention is simplified in both hardware and software, and can easily cope with expansion of the number of stages.
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