A DMA controller for supporting a data transfer operation between a first memory and a second memory includes a selector for selecting data stored in the first memory per data unit, a shifting circuit for shifting the data selected by the selector to one direction of required numbers, a F/F (flip-flop) for storing the data shifted by the shifting circuit for every data unit, a feedback circuit for feedback of the stored data by the F/F to the shifting circuit, and a transfer circuit for transferring the data stored in the F/F to the second memory.