An I-axis phase pulse is allowed to be detected at the sampling point of a chrominance signal with a digitally-implemented circuit. A chrominance signal (sampling frequency f.sub.1) is subsampled by a frequency f.sub.2 (f.sub.1 /N) and subsampling pulses generated in N subsampling pulse generators 10 for N phases, the adjacent ones of the pulses being shifted by one clock (1/f.sub.1) with respect to one another. The subsampled chrominance signal is input to an I-axis determining circuit 17. The I-axis determining circuit operates to detect a maximum value M.sub.1 of a color burst signal (sampling frequency f.sub.1) and the data M.sub.2 after one clock and compare both of the values with each other. Based on the compared result, a selecting signal S.sub.4 is detected for selecting an I-axis phase pulse at the sampling point of the chrominance signal. A selecting circuit 18 selects, as an I-axis phase pulse S.sub.5, a proper one of the N sampling pulse for N phases based on the selecting signal and applies the I-axis phase pulse S.sub.5 to an (N+1)th subsampling circuit 19. The subsampling circuit 19 can provide an I-axis detected output S.sub.3 at the sampling point of the chrominance signal.