发明授权
US5330922A Semiconductor process for manufacturing semiconductor devices with
increased operating voltages
失效
用于制造具有增加的工作电压的半导体器件的半导体工艺
- 专利标题: Semiconductor process for manufacturing semiconductor devices with increased operating voltages
- 专利标题(中): 用于制造具有增加的工作电压的半导体器件的半导体工艺
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申请号: US411782申请日: 1989-09-25
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公开(公告)号: US5330922A公开(公告)日: 1994-07-19
- 发明人: John P. Erdeljac , Louis N. Hutter
- 申请人: John P. Erdeljac , Louis N. Hutter
- 申请人地址: TX Dallas
- 专利权人: Texas Instruments Incorporated
- 当前专利权人: Texas Instruments Incorporated
- 当前专利权人地址: TX Dallas
- 主分类号: H01L21/8249
- IPC分类号: H01L21/8249 ; H01L21/265
摘要:
A method of manufacturing semiconductor devices with increased operating voltages is described. A dopant of a second conductivity type is implanted into a region of a first epitaxial layer of the first conductivity type to form a buried layer. A substantially smaller dosage of a faster-diffusing dopant of the second conductivity type is then implanted into the buried layer region. The second epitaxial layer of the first conductivity type is formed over the first epitaxial layer. A region of the second epitaxial layer overlying the doped region of the first epitaxial layer is implanted with a dopant of the second conductivity type and diffused to form a doped well. The faster-diffusing dopant diffuses upward to make good electrical contact with the doped well diffusing downward from the surface. The lateral diffusion of the faster-diffusing dopant can be contained, so that lateral spacing design rules do not have to be increased. A thicker second epitaxial layer can thus be used, resulting in increased operating voltage.
公开/授权文献
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