发明授权
- 专利标题: Discrete cosine transformation processor
- 专利标题(中): 离散余弦变换处理器
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申请号: US997326申请日: 1992-12-28
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公开(公告)号: US5331584A公开(公告)日: 1994-07-19
- 发明人: Toshiaki Kitsuki , Akira Sawada
- 申请人: Toshiaki Kitsuki , Akira Sawada
- 申请人地址: JPX Tokyo
- 专利权人: NEC Corporation
- 当前专利权人: NEC Corporation
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX3-360287 19911227
- 主分类号: H03M7/30
- IPC分类号: H03M7/30 ; G06F17/14 ; G06T9/00 ; H04N1/41 ; H04N19/42 ; H04N19/436 ; H04N19/60 ; H04N19/625 ; G06F7/38
摘要:
A discrete cosine transformation processor subjects a plurality of input data to addition or subtraction at an adder/subtracter with two combinations according to the control signal every clock pulse so as to output a plurality of combination data. The combination data are assigned to eight groups according to certain combinations and each of them is input to one of eight selection circuits. The selection circuit selects one data from the combination input data according to the control signal and outputs the selected data every clock pulse. A multiplier receives the data selected by the selection circuit and multiplies it by a predetermined coefficient every clock pulse. Further, a second adder/subtracter subjects the output data from the multiplier to addition or subtraction in different combinations according to the control signal to determine cosine transformation coefficient to inverse cosine transformation coefficients.
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