发明授权
- 专利标题： Apparatus for real time interference signal rejection
- 专利标题（中）： 用于实时干扰信号抑制的装置
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申请号： US886203申请日： 1992-05-21
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公开(公告)号： US5355091A公开(公告)日： 1994-10-11
- 发明人: Stuart D. Albert , William J. Skudera, Jr.
- 申请人： Stuart D. Albert , William J. Skudera, Jr.
- 申请人地址： DC Washington
- 专利权人： The United States of America as represented by the Secretary of the Army
- 当前专利权人： The United States of America as represented by the Secretary of the Army
- 当前专利权人地址： DC Washington
- 主分类号： H04B1/12
- IPC分类号： H04B1/12 ; H04K3/00 ; H04B1/10 ; G01S7/36
摘要：
Disclosed is a real time interference signal rejection circuit which utils a conventional chirp-Z analyzer to generate a critical number and stop a counter circuit. The critical number is then read by a microprocessor which calculates new tap values from a set of predetermined tap values to reprogram a programmable filter.
公开/授权文献
- US4707666A Frequency demodulator circuit with zero-crossing counter 公开/授权日：1987-11-17
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