A multiprocessor system having a plurality of microprocessors includes an OR gate for ORing read signals from the microprocessors and a unit for receiving an output signal from the OR gate and producing an initial processing permission signal, thereby selecting a microprocessor to conduct an initial processing for a shared circuit. In concurrence with the operation monitoring the initial processing permission signal, each microprocessor simultaneously outputs a read signal. The OR gate generates an output signal on receiving a read signal. This changes the initial processing permission signal thus produced by the unit from the permission state to the inhibit state. The microprocessor monitors the initial processing permission signal to conduct the initial processing for the shared circuit only when the signal is in the permission state. Even when there exists a microprocessor in an abnormal state, the multiprocessor system can be set to the operable state by another microprocessor.