发明授权
- 专利标题: Semiconductor memory device having improved write characteristic
- 专利标题(中): 具有改善的写入特性的半导体存储器件
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申请号: US982844申请日: 1992-11-30
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公开(公告)号: US5357133A公开(公告)日: 1994-10-18
- 发明人: Shigeru Morita
- 申请人: Shigeru Morita
- 申请人地址: JPX Kawasaki
- 专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人地址: JPX Kawasaki
- 优先权: JPX3-315836 19911129
- 主分类号: H01L21/8247
- IPC分类号: H01L21/8247 ; H01L21/336 ; H01L27/115 ; H01L29/788 ; H01L29/792 ; H01L29/78 ; H01L27/02
摘要:
The present invention comprises a groove formed in a semiconductor substrate, a buried element isolation region formed in the groove, source and drain diffusion regions formed inside the buried element isolation region, an electrode wiring layer connected the buried element isolation region across the diffusion regions and constituted by a two-layered structure consisting of a control gate and a floating gate, and a side-wall diffusion region which extends along the groove, is in contact with the source and drain diffusion regions, and is formed at a position corresponding to at least the electrode wiring layer. As a result, the write characteristic of a non-volatile memory can be improved, and at the same time, the non-volatile memory can be micropatterned.
公开/授权文献
- US6099904A Low resistivity W using B.sub.2 H.sub.6 nucleation step 公开/授权日:2000-08-08
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