Invention Grant
US5374893A Apparatus for testing, burn-in, and/or programming of integrated circuit
chips, and for placing solder bumps thereon
失效
用于集成电路芯片的测试,老化和/或编程以及用于在其上放置焊料凸块的装置
- Patent Title: Apparatus for testing, burn-in, and/or programming of integrated circuit chips, and for placing solder bumps thereon
- Patent Title (中): 用于集成电路芯片的测试,老化和/或编程以及用于在其上放置焊料凸块的装置
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Application No.: US127784Application Date: 1993-09-27
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Publication No.: US5374893APublication Date: 1994-12-20
- Inventor: Nicholas G. Koopman , Glenn A. Rinne , Iwona Turlik , Edward K. Yung
- Applicant: Nicholas G. Koopman , Glenn A. Rinne , Iwona Turlik , Edward K. Yung
- Applicant Address: NC Research Triangle Park
- Assignee: MCNC
- Current Assignee: MCNC
- Current Assignee Address: NC Research Triangle Park
- Main IPC: G01R31/26
- IPC: G01R31/26 ; G01R31/28 ; H01L21/326 ; H01L21/66 ; H01L23/58 ; G01R31/00

Abstract:
An integrated circuit chip having solder bumps thereon may be tested using a temporary substrate having substrate pads corresponding to locations of the input/output pads on the chip and having a sacrificial conductor layer on the temporary substrate pads. The solder bumps are placed adjacent the corresponding sacrificial metal layer and heated to form an electrical and mechanical connection between the chip and the temporary substrate. The chip is then tested and/or burned-in on the temporary substrate. After testing/burn-in, the sacrificial metal layer is dissolved into the solder bumps by heating. The integrated circuit chip, including a solder bump having the dissolved sacrificial metal layer therein, may be easily removed from the temporary substrate. Solder bumps may also be formed on the temporary substrate and transferred to unbumped chips. Solder bumps with different characteristics may be formed by varying the current-time product to each individual pad of the temporary substrate during a plating operation.
Public/Granted literature
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