Invention Grant
US5376843A TTL input buffer with on-chip reference bias regulator and decoupling
capacitor
失效
具有片内基准偏置调节器和去耦电容的TTL输入缓冲器
- Patent Title: TTL input buffer with on-chip reference bias regulator and decoupling capacitor
- Patent Title (中): 具有片内基准偏置调节器和去耦电容的TTL输入缓冲器
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Application No.: US929872Application Date: 1992-08-11
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Publication No.: US5376843APublication Date: 1994-12-27
- Inventor: Ta-Ke Tien , Chau-chin Wu , Richard C. Li
- Applicant: Ta-Ke Tien , Chau-chin Wu , Richard C. Li
- Applicant Address: CA Santa Clara
- Assignee: Integrated Device Technology, Inc.
- Current Assignee: Integrated Device Technology, Inc.
- Current Assignee Address: CA Santa Clara
- Main IPC: H03K19/003
- IPC: H03K19/003 ; H03K19/0185 ; H03K19/20
Abstract:
An input buffer insensitive to changes in supply voltage, temperature and other operational parameters comprises a decoupling capacitor and receives a reference voltage. In one embodiment, the input buffer comprises a CMOS invertor in which a PMOS transistor is provided to decouple the output signal from a fluctuation of the ground voltage ("ground bounce"). In one embodiment, a band gap type voltage regulator provides the reference voltage of the input buffer.
Public/Granted literature
- US5893288A Multiple outlet finishing mill Public/Granted day:1999-04-13
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