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US5404070A Low capacitance field emission display by gate-cathode dielectric 失效
通过栅极 - 阴极电介质消除的低电容场发射显示

Low capacitance field emission display by gate-cathode dielectric
摘要:
A method for making a matrix addressed flat panel display using field emission microtips having reduced capacitance and low power consumption, and the resulting display, are described. A dielectric base substrate on which to form the field emission microtips is provided. Cathode columns of parallel spaced conductors are formed upon the substrate. First dielectric supports are formed in and above spaces between the cathode columns. Gate lines for the display are formed of parallel spaced conductors over the supports and perpendicular to the supports and the cathode columns. Second dielectric supports are formed below spaces between the gate lines, on the cathode columns and intersecting with the first supports. Pixels of the display are formed at the intersections of the cathode columns and the gate lines. There are a plurality of openings in the gate lines, at the pixels. A plurality of field emission microtips are formed at each of the pixels, connected to and extending up from the cathode columns and into the plurality of openings.
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