A common channel signal extraction/insertion device for a multiplexed digital transmission system includes a common channel signal insertion/extraction circuit instead of time switches. The common channel signal insertion/extraction circuit includes: a receiver-side speed converter memory 51A for buffering the multiplexed signal 13 received from the multiplexer circuit 3; and a transmitter-side speed converter memory 52A for buffering the common channel signals received from the common channel signal controller 7. The high-speed and the low-speed side reading and writing operations are controlled by the high-speed side controller 51C and the low-speed side controller 51D, respectively. The selector 53 selects between the common channel signals read out from the transmitter-side speed converter memory 52A and the data supplied from the digital switching channel 6, thereby obtaining the multiplexed signal 13a and outputting it to the demultiplexer 12.