发明授权
US5426607A Redundant circuit for memory having redundant block operatively
connected to special one of normal blocks
失效
具有冗余块的存储器的冗余电路可操作地连接到正常块的特殊块
- 专利标题: Redundant circuit for memory having redundant block operatively connected to special one of normal blocks
- 专利标题(中): 具有冗余块的存储器的冗余电路可操作地连接到正常块的特殊块
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申请号: US091732申请日: 1993-07-14
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公开(公告)号: US5426607A公开(公告)日: 1995-06-20
- 发明人: Kenji Ishibashi
- 申请人: Kenji Ishibashi
- 申请人地址: JPX Osaka
- 专利权人: Sharp Kabushiki Kaisha
- 当前专利权人: Sharp Kabushiki Kaisha
- 当前专利权人地址: JPX Osaka
- 优先权: JPX63-105744 19880427
- 主分类号: G11C29/00
- IPC分类号: G11C29/00 ; G11C7/00
摘要:
A redundant circuit for a memory circuit having a plurality of memory cell blocks, which includes a redundant memory cell block for a predetermined one of the memory cell blocks. There is a redundancy decoder for producing a redundant memory cell selecting signal, and a block selecting signal generating circuit. The output of the block selecting signal generating circuit is arranged to be controlled by the redundant memory cell selecting signal for the predetermined memory cell block so as to relieve a faulty memory cell block by the redundant memory cell block of the predetermined memory cell block.
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