发明授权
- 专利标题: Interface circuit with backgate bias control of a transistor
- 专利标题(中): 具有背栅偏置控制的晶体管接口电路
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申请号: US226683申请日: 1994-04-12
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公开(公告)号: US5442307A公开(公告)日: 1995-08-15
- 发明人: Hiroshi Shigehara , Masanori Kinugasa
- 申请人: Hiroshi Shigehara , Masanori Kinugasa
- 申请人地址: JPX
- 专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人: Kabushiki Kaisha Toshiba
- 当前专利权人地址: JPX
- 优先权: JPX5-084507 19930412
- 主分类号: H03K19/0175
- IPC分类号: H03K19/0175 ; H03K19/0185
摘要:
An interface circuit includes first and second MOS transistors of depletion type, first and second switching elements, and a control circuit. The current path of the first MOS transistor is connected between an output node of a MOS circuit formed in a semiconductor substrate and an output terminal and the gate thereof is connected to a power supply. The first switching element is connected between the backgate of the first MOS transistor and a ground terminal. The second switching element and the current path of the second MOS transistor are serially connected between the backgate of the first MOS transistor and the output terminal. The gate of the second MOS transistor is connected to the power supply and the backgate thereof is connected to the backgate of the first MOS transistor. The first and second switching elements are set into complementary states according to an output of the MOS circuit in response to an output signal of the control circuit.