发明授权
US5444538A System and method for optimizing the grid and intrafield registration of wafer patterns 失效
用于优化晶圆和晶片格局的系统和方法

System and method for optimizing the grid and intrafield registration of
wafer patterns
摘要:
A system and method according to the invention identify assignable overlay error sources contributing to pattern misregistration on a wafer. Specifically, this system treats the case where a single overlay field from a given layer is sufficiently large to cover two or more fields patterned on any other layer. This system identifies values of correctable coefficients, such that when these values are applied to corrective adjustment to the vector field of measured overlay misregistration, the result tends to reduce the sums of the vector magnitudes to a minimum.
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