发明授权
US5454082A System for preventing an unselected controller from transferring data via a first bus while concurrently permitting it to transfer data via a second bus 失效
用于防止未选择的控制器经由第一总线传送数据同时允许其经由第二总线传送数据的系统

System for preventing an unselected controller from transferring data
via a first bus while concurrently permitting it to transfer data via a
second bus
摘要:
An interleave lock arrangement for a computer system ensures the atomicity of a data transfer operation over a selected bus between a selected intelligent controller and a selected memory interleave, without interfering with data transfers over unselected buses between unselected intelligent controllers and unselected memory interleaves. An interleave lock signal issued by the selected intelligent controller over the selected bus is detected by and prevents only unselected intelligent controllers on the selected bus from executing bus cycles while the interleave lock signal is being asserted.
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