发明授权
US5485425A Semiconductor memory device having redundant column and operation method
thereof
失效
具有冗余列的半导体存储器件及其操作方法
- 专利标题: Semiconductor memory device having redundant column and operation method thereof
- 专利标题(中): 具有冗余列的半导体存储器件及其操作方法
-
申请号: US375727申请日: 1995-01-20
-
公开(公告)号: US5485425A公开(公告)日: 1996-01-16
- 发明人: Hidetoshi Iwai , Masaya Muranaka , Takumi Nasu , Shunichi Sukegawa
- 申请人: Hidetoshi Iwai , Masaya Muranaka , Takumi Nasu , Shunichi Sukegawa
- 申请人地址: JPX Tokyo TX Dallas
- 专利权人: Hitachi, Ltd.,Texas Instruments Incorporated
- 当前专利权人: Hitachi, Ltd.,Texas Instruments Incorporated
- 当前专利权人地址: JPX Tokyo TX Dallas
- 优先权: JPX4-196603 19920630
- 主分类号: G11C11/401
- IPC分类号: G11C11/401 ; G11C17/12 ; G11C29/00 ; G11C29/04 ; G11C7/00
摘要:
There is provided a semiconductor memory device having a redundant column. This memory device has a redundant column disposed in the direction of the Y-system address, a ROM accessed by using an X-system address, a Y-system address signal having a defective cell included in the cells therein being electrically written into the ROM, a comparator circuit for comparing a signal read out from this ROM with a Y-system address signal and outputting a coincidence signal upon coincidence, and a defect relieving circuit responsive to output of the coincidence signal from this comparator circuit to cause selection of the redundant column of Y system instead of the Y-system address selection device.
公开/授权文献
信息查询