发明授权
US5486486A Process for the manufacture of an integrated voltage limiter and
stabilizer in flash EEPROM memory devices
失效
用于在闪存EEPROM存储器件中制造集成式限压器和稳压器的工艺
- 专利标题: Process for the manufacture of an integrated voltage limiter and stabilizer in flash EEPROM memory devices
- 专利标题(中): 用于在闪存EEPROM存储器件中制造集成式限压器和稳压器的工艺
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申请号: US301792申请日: 1994-09-07
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公开(公告)号: US5486486A公开(公告)日: 1996-01-23
- 发明人: Paolo Ghezzi , Alfonso Maurelli
- 申请人: Paolo Ghezzi , Alfonso Maurelli
- 申请人地址: ITX Milan
- 专利权人: SGS-Thomson Microelectronics, S.r.1.
- 当前专利权人: SGS-Thomson Microelectronics, S.r.1.
- 当前专利权人地址: ITX Milan
- 优先权: EPX93830365 19930910
- 主分类号: H01L21/8247
- IPC分类号: H01L21/8247 ; H01L21/329 ; H01L27/06 ; H01L27/115 ; H01L29/866
摘要:
A process for the manufacture of an integrated voltage limiter and stabilizer component in a flash EEPROM memory device comprises a step of formation of an N type lightly doped well on a single-crystal silicon substrate; a step of formation of an active area on the surface of said N type well; a step of growth of a thin gate oxide layer over said active area; a step of implantation of a first heavy dose of N type dopant into said N type well to obtain an N type region; a step of implantation of a second heavy dose, higher than said first heavy dose, of N type dopant into said N type region to obtain an N+ contact region to both the N type well and said N type region; a step of implantation of a third heavy dose, higher than said first heavy dose, of P type dopant into said N type region to form a P+ region.
公开/授权文献
- US6112653A Paper roll impression identification 公开/授权日:2000-09-05
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