Invention Grant
US5494849A Single-etch stop process for the manufacture of silicon-on-insulator
substrates
失效
用于制造绝缘体上硅衬底的单蚀刻停止工艺
- Patent Title: Single-etch stop process for the manufacture of silicon-on-insulator substrates
- Patent Title (中): 用于制造绝缘体上硅衬底的单蚀刻停止工艺
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Application No.: US409208Application Date: 1995-03-23
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Publication No.: US5494849APublication Date: 1996-02-27
- Inventor: Subramanian S. Iyer , Emil Baran , Mark L. Mastroianni , Robert A. Craven
- Applicant: Subramanian S. Iyer , Emil Baran , Mark L. Mastroianni , Robert A. Craven
- Applicant Address: MO St. Peters
- Assignee: Si Bond L.L.C.
- Current Assignee: Si Bond L.L.C.
- Current Assignee Address: MO St. Peters
- Main IPC: H01L21/322
- IPC: H01L21/322 ; H01L21/762 ; H01L21/76
Abstract:
A single-etch stop process for the manufacture of silicon-on-insulator substrates. The process includes forming a silicon-on-insulator bonded substrate comprising a handle wafer, a device wafer, a device layer having a thickness of between about 0.5 and 50 micrometers, and an oxide layer with the device layer being between the device wafer and the oxide layer and the oxide layer being between the device layer and the handle wafer, the device wafer having a boron concentration of at least about 1.times.10.sup.18 boron atoms/cm.sup.3 and a resistivity of about 0.01 to about 0.02 ohm-cm. A portion of the device wafer is mechanically removed from the silicon-on-insulator bonded substrate wherein the device wafer has a total thickness variation across the surface of the wafer of less than about 2 micrometers and a defect-free surface after the mechanical removal step. The defect-free surface of the device wafer is thereafter etched away to expose the device layer, and the exposed device layer is polished to produce a silicon-on-insulator substrate having a device layer the total thickness variation of which does not exceed 10% of the maximum thickness of the device layer.
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