发明授权
US5522050A Bus-to-bus bridge for a multiple bus information handling system that optimizes data transfers between a system bus and a peripheral bus 失效
用于多总线信息处理系统的总线到总线桥,可优化系统总线和外设总线之间的数据传输

Bus-to-bus bridge for a multiple bus information handling system that
optimizes data transfers between a system bus and a peripheral bus
摘要:
Hardware logic within a host bridge that connects a system bus to a peripheral bus using PCI bus architecture or a peripheral bus that uses a bus architecture similar to PCI. The hardware optimizes the speed at which data transfers are accomplished between the buses while translating the data transfers between the different architectures of the two buses.
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