发明授权
- 专利标题: Multiplex circuit arrangement for use with a semiconductor integrated circuit
- 专利标题(中): 用于半导体集成电路的多路电路装置
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申请号: US464344申请日: 1995-06-05
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公开(公告)号: US5523713A公开(公告)日: 1996-06-04
- 发明人: Seigoh Yukutake , Yutaka Kobayashi , Takashi Akioka , Masahiro Iwamura
- 申请人: Seigoh Yukutake , Yutaka Kobayashi , Takashi Akioka , Masahiro Iwamura
- 申请人地址: JPX Tokyo
- 专利权人: Hitachi, Ltd.
- 当前专利权人: Hitachi, Ltd.
- 当前专利权人地址: JPX Tokyo
- 优先权: JPX2-311502 19901119; JPX3-057089 19910320
- 主分类号: H03F3/72
- IPC分类号: H03F3/72 ; H03K17/62
摘要:
A multiplex circuit is disclosed in which a plurality of bipolar transistors are combined and in which the respective base terminals thereof are used as inputs, thereby to construct an emitter follower type multiplex circuit. In such an emitter follower type multiplex circuit, the multiplexing function of non-selection/selection is effected by controlling the base potential of the respective bipolar transistors by providing a MOS transistor between each base and a high potential of the power source through a resistor and a current drawing circuit. In accordance with such a scheme, when a selection of one input signal is made, the bipolar transistor corresponding thereto is permitted to turn ON on the basis of an input signal supplied to the base terminal thereof. The bipolar transistors corresponding to the non-selection input signals are maintained OFF, through activating the current drawing circuits associated therewith, irrespective of the potential levels of the incoming input signals supplied to the base terminals thereof. In the emitter follower type multiplex circuit, a constant current source is also provided between the commonly connected emitters of the bipolar transistors and the power source of low potential. The multiplex arrangement effected can be of the collector dot type multiplex circuit. Such multiplex circuits are used with a semiconductor integrated circuit such as a memory circuit.
公开/授权文献
- US5051291A Magnetic recording medium 公开/授权日:1991-09-24