A microprocessor having a register file inside is so combined with an external memory through a dedicated high-speed bus that the memory operates as a bank for said register file. This microprocessor further has means for controlling a data transfer with said memory or peripheral devices. When an address information to access said memory is input to this microprocessor in order to control a data transfer between said memory and a peripheral device, said control means finds if the accessed area in said memory is now in use as a bank for said register file, or not. When it is in use, said control means controls a data transfer between said peripheral device and said register file, instead of controlling the data transfer between said memory and said peripheral device. So, said peripheral device can always access the newest information in said memory.