A high precision fast finite impulse response (FIR) filter which periodically samples an analog input signal and holds a sequentially-replaced number of the resulting discrete-time analog values in fixed storage cells while each value is being multiplied by a number of digital weights. The discrete-time analog values are not passed through delay devices and therefore do not degrade. The weights are stored in a memory or shift register and supplied to the multipliers in a repeating sequence. A predetermined number of the weights are set to zero to increase the setup time of the analog multipliers thereby increasing the precision without slowing the clocking frequency.