Invention Grant
US5586279A Data processing system and method for testing a data processor having a
cache memory
失效
用于测试具有高速缓冲存储器的数据处理器的数据处理系统和方法
- Patent Title: Data processing system and method for testing a data processor having a cache memory
- Patent Title (中): 用于测试具有高速缓冲存储器的数据处理器的数据处理系统和方法
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Application No.: US187885Application Date: 1994-01-28
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Publication No.: US5586279APublication Date: 1996-12-17
- Inventor: Ilan Pardo , Yair Libman
- Applicant: Ilan Pardo , Yair Libman
- Applicant Address: IL Schaumberg
- Assignee: Motorola Inc.
- Current Assignee: Motorola Inc.
- Current Assignee Address: IL Schaumberg
- Priority: GBX9302118 19930203
- Main IPC: G06F11/36
- IPC: G06F11/36 ; G06F12/08
Abstract:
A cached processor (2) comprises a cache memory (8') having mode switching means for selecting an address capture mode whereby information, such as data and/or instructions, can be captured and stored in all or part of a cache array (30) of the cache memory in real time. The captured information can at any time be transferred to, and used by, an external debug station, coupled to the cached processor, to observe the executed program flow.
Public/Granted literature
- US5965197A Article comprising fine-grained solder compositions with dispersoid particles Public/Granted day:1999-10-12
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