发明授权
- 专利标题: D/A converter capable of disabling the output
- 专利标题(中): D / A转换器能够禁止输出
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申请号: US345754申请日: 1994-11-22
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公开(公告)号: US5602552A公开(公告)日: 1997-02-11
- 发明人: Shinichi Hirose , Minoru Abe
- 申请人: Shinichi Hirose , Minoru Abe
- 申请人地址: JPX Tokyo JPX Hyogo
- 专利权人: Mitsubishi Denki Kabushiki Kaisha,Mitsubishi Electric Semiconductor Software Co., Ltd.
- 当前专利权人: Mitsubishi Denki Kabushiki Kaisha,Mitsubishi Electric Semiconductor Software Co., Ltd.
- 当前专利权人地址: JPX Tokyo JPX Hyogo
- 优先权: JPX5-330705 19931227
- 主分类号: H03M1/10
- IPC分类号: H03M1/10 ; H03M1/06 ; H03M1/78
摘要:
A digital/analog converting circuit wherein, on the digital signal input side of each of resistances D.sub.1, D.sub.2 . . . D.sub.n whose one end being connected to a digital signal input and the other end to an analog signal output, each of the three-state non-inverting buffers B.sub.1, B.sub.2 . . . B.sub.n is provided, and between the analog signal output side of the resistance D.sub.n and the ground potential portion, a MOS transistor 20 is provided. It enables to switch the output/non-output or an analog signal obtained by converting a digital signal, and as a result, a digital/analog converting circuit not generating non-linear region in the digital/analog conversion characteristic can be obtained.
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