An extreme level circuit for determining an extreme level of a plurality of input levels includes a plurality of independent parallel branches (T4+M2+M5, T5+M3+M6) with intercoupled output terminals (MAX) from which the extreme level can be taken. Each branch has an input terminal (INA, INB) for receiving a respective one of the input levels, and includes a separate distortion compensation circuit (M2+M5, M3+M6) which is independent of the distortion compensation circuits of the other parallel branches.